Author:
Cauwenberghs G.,Temes G.C.
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Signal Processing
Cited by
48 articles.
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1. A 1.2-V 2.87-$\mu $W 94.0-dB SNDR Discrete-Time 2-0 MASH Delta-Sigma ADC;IEEE Journal of Solid-State Circuits;2022
2. A multi-level cascaded delta-sigma modulator with reduced quantization noise leakage;2021 IEEE 51st International Symposium on Multiple-Valued Logic (ISMVL);2021-05
3. Two-Stage Internal DAC Mismatch Mitigation for a Continuous-Time Delta-Sigma ADC;2019 IEEE Nordic Circuits and Systems Conference (NORCAS): NORCHIP and International Symposium of System-on-Chip (SoC);2019-10
4. 2‐1 Switched‐current multi‐stage noise‐shaping delta–sigma modulator with a digital noise‐cancellation circuit;IET Circuits, Devices & Systems;2019-04
5. Fully-VCO-Based High-Order $$\varDelta \varSigma $$ ADC;Design of Power-Efficient Highly Digital Analog-to-Digital Converters for Next-Generation Wireless Communication Systems;2017-10-05