A general model for the frequency response of multiphase charge transfer delay lines
Author:
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering
Link
http://xplorestaging.ieee.org/ielx5/4/22565/01051233.pdf?arnumber=1051233
Cited by 5 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献
1. A radio-frequency real-time spectrum sensor based on an analog signal processing magnitude calculator;Proceedings of the 30th Symposium on Integrated Circuits and Systems Design Chip on the Sands - SBCCI '17;2017
2. An analog RF fully differential common mode controlled delay line in 28nm FDSOI technology;Proceedings of the 30th Symposium on Integrated Circuits and Systems Design Chip on the Sands - SBCCI '17;2017
3. A buried-channel charge-coupled device with non-overlapping gate structure for a CMOS/BCCD process;Semiconductor Science and Technology;1992-05-01
4. Small-signal charge transfer inefficiency experiments explained by the McWhorter interface state model;IEEE Transactions on Electron Devices;1984-10
5. Characterization of charge-transfer devices with position-dependent small-signal transfer inefficiency;International Journal of Electronics;1980-02
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