Systolic Formulation for Low-Complexity Serial-Parallel Implementation of Unified Finite Field Multiplication over GF(2<sup>m</sup>)-Reference-Cited by-同舟云学术

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Systolic Formulation for Low-Complexity Serial-Parallel Implementation of Unified Finite Field Multiplication over GF(2^m)

Published:2007-07 Issue: Volume: Page:
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Container-title:2007 IEEE International Conf. on Application-specific Systems, Architectures and Processors (ASAP)
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Author:

Meher Pramod Kumar

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx5/4429947/4429948/04429970.pdf?arnumber=4429970

Cited by 3 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Input–Output Scheduling and Control for Efficient FPGA Realization of Digit-Serial Multiplication Over Generic Binary Extension Fields;Circuits, Systems, and Signal Processing;2024-08-07

2. Low Power Semi-systolic Architectures for Polynomial-Basis Multiplication over GF(2 m ) Using Progressive Multiplier Reduction;Journal of Signal Processing Systems;2015-04-19

3. Image Segmentation and Shape Analysis for Road-Sign Detection;IEEE Transactions on Intelligent Transportation Systems;2011-03

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