Optimized data-reuse in processor arrays
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Container-title:Proceedings. 15th IEEE International Conference on Application-Specific Systems, Architectures and Processors, 2004.
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Author:
Siegel S.,Merker R.
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2 articles.
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1. Parameterized Mapping of Algorithms onto Processor Arrays with Sub-Word Parallelism;2006 International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation;2006-07
2. Minimum Cost for Channels and Registers in Processor Arrays by Avoiding Redundancy;IEEE 17th International Conference on Application-specific Systems, Architectures and Processors (ASAP'06);2006