Author:
Chen Yuhan,Du Xuehui,Xiao Wei,Zhang Haiyang
Cited by
4 articles.
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2. Hardware Optimization and FPGA Implementation of Pipelined ZUC Architecture;2021 IEEE 6th International Conference on Computing, Communication and Automation (ICCCA);2021-12-17
3. A Hardware Implementation of ZUC-256 Stream Cipher;2020 IEEE 14th International Conference on Anti-counterfeiting, Security, and Identification (ASID);2020-10-30
4. A Survey on Hardware Implementation of Cryptographic Algorithms Using Field Programmable Gate Array;INT CONF COMM SYST;2020