A 231-MHz, 2.18-mW 32-bit Logarithmic Arithmetic Unit for Fixed-Point 3-D Graphics System-Reference-Cited by-同舟云学术

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A 231-MHz, 2.18-mW 32-bit Logarithmic Arithmetic Unit for Fixed-Point 3-D Graphics System

Published:2006-11 Issue:11 Volume:41 Page:2373-2381
ISSN:0018-9200
Container-title:IEEE Journal of Solid-State Circuits
language:en
Short-container-title:IEEE J. Solid-State Circuits

Author:

Kim H.,Nam B.-G.,Sohn J.-H.,Woo J.-H.,Yoo H.-J.

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

http://xplorestaging.ieee.org/ielx5/4/36138/01717660.pdf?arnumber=1717660

Cited by 55 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

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3. Modified Logarithmic Multiplication Approximation for Machine Learning;2023 IEEE 5th International Conference on Artificial Intelligence Circuits and Systems (AICAS);2023-06-11

4. Auto-LUT: Auto Approximation of Non-Linear Operations for Neural Networks on FPGA;2023 IEEE International Symposium on Circuits and Systems (ISCAS);2023-05-21

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