An 860-Mb/s (8158,7136) Low-Density Parity-Check Encoder

Author:

Miles L.H.,Gambles J.W.,Maki G.K.,Ryan W.E.,Whitaker S.R.

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Cited by 14 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Flexible and High-Efficiency LDPC Encoder Architecture for CCSDS Standard;Journal of Physics: Conference Series;2024-08-01

2. Area‐ and energy‐efficient high‐throughput QC‐LDPC encoder for space applications;Electronics Letters;2023-12

3. A Miniaturized LDPC Encoder: Two-Layer Architecture for CCSDS Near-Earth Standard;IEEE Transactions on Circuits and Systems II: Express Briefs;2021-07

4. Low-complexity encoder implementation for LDPC codes in CCSDS standard;IEICE Electronics Express;2021-05-10

5. Design a Low Power and High Speed Parity Checker using Exclusive–or Gates;International Journal of Innovative Technology and Exploring Engineering;2021-02-28

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