A 1-V 100-MS/s 8-bit CMOS Switched-Opamp Pipelined ADC Using Loading-Free Architecture

Author:

Wu Patrick Y.,Cheung Vincent Sin-Luen,Luong Howard C.

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Cited by 45 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. An Improved Recycling Folded-Cascode Amplifier with High Unity-Gain Frequency;2020 IEEE International Conference on Consumer Electronics - Taiwan (ICCE-Taiwan);2020-09-28

2. A Robust Local Positive Feedback Based Performance Enhancement Strategy for Non-Recycling Folded Cascode OTA;IEEE Transactions on Circuits and Systems I: Regular Papers;2020-09

3. A Positive Feedback-Based Op-Amp Gain Enhancement Technique for High-Precision Applications;Journal of Circuits, Systems and Computers;2020-03-20

4. Noise analysis of replica driving technique and its verification to 12‐bit 200 MS/s pipelined ADC;IET Circuits, Devices & Systems;2019-11

5. An Enhanced Recycling Folded Cascode Amplifier;Advances in Intelligent Systems and Computing;2019-10-31

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