A 34 MB/s MLC Write Throughput 16 Gb NAND With All Bit Line Architecture on 56 nm Technology-Reference-Cited by-同舟云学术

A 34 MB/s MLC Write Throughput 16 Gb NAND With All Bit Line Architecture on 56 nm Technology

Published:2009-01 Issue:1 Volume:44 Page:186-194
ISSN:0018-9200
Container-title:IEEE Journal of Solid-State Circuits
language:
Short-container-title:IEEE J. Solid-State Circuits

Author:

Cernea Raul-Adrian,Pham Long,Moogat Farookh,Chan Siu,Le Binh,Li Yan,Tsao Shouchang,Tseng Tai-Yuan,Nguyen Khanh,Li Jason,Hu Jayson,Yuh Jong Hak,Hsu Cynthia,Zhang Fanglin,Kamei Teruhiko,Nasu Hiroaki,Kliza Phil,Htoo Khin,Lutze Jeffrey,Dong Yingda,Higashitani Masaaki,Yang Junnhui,Lin Hung-Szu,Sakhamuri Vamshi,Li Alan,Pan Feng,Yadala Sridhar,Taigor Subodh,Pradhan Kishan,Lan James,Chan James,Abe Takumi,Fukuda Yasuyuki,Mukai Hideo,Kawakami Koichi,Liang Connie,Ip Tommy,Chang Shu-Fen,Lakshmipathi Jaggi,Huynh Sharon,Pantelakis Dimitris,Mofidi Mehrdad,Quader Khandker

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

http://xplorestaging.ieee.org/ielx5/4/4735533/04735566.pdf?arnumber=4735566

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