Soft Error Mitigation for Deep Convolution Neural Network on FPGA Accelerators-Reference-Cited by-同舟云学术

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Soft Error Mitigation for Deep Convolution Neural Network on FPGA Accelerators

Published:2020-08 Issue: Volume: Page:
ISSN:
Container-title:2020 2nd IEEE International Conference on Artificial Intelligence Circuits and Systems (AICAS)
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Author:

Li Wenshuo,Ge Guangjun,Guo Kaiyuan,Chen Xiaoming,Wei Qi,Gao Zhen,Wang Yu,Yang Huazhong

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/9066468/9072687/09073925.pdf?arnumber=9073925

Cited by 14 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Comparative study: AutoDPR-SEM for enhancing CNN reliability in SRAM-based FPGAs through autonomous reconfiguration;Microelectronics Reliability;2024-06

2. Single event effects evaluation on convolution neural network in Xilinx 28 nm system on chip;Chinese Physics B;2024-06-01

3. SAFFIRA: a Framework for Assessing the Reliability of Systolic-Array-Based DNN Accelerators;2024 27th International Symposium on Design & Diagnostics of Electronic Circuits & Systems (DDECS);2024-04-03

4. Implementation of Highly Reliable Convolutional Neural Network with Low Overhead on Field-Programmable Gate Array;Electronics;2024-02-25

5. A Systematic Literature Review on Hardware Reliability Assessment Methods for Deep Neural Networks;ACM Computing Surveys;2024-01-22

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