Maximum rate single-phase clocking of a closed pipeline including wave pipelining, stoppability, and startability
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Published:1995
Issue:12
Volume:14
Page:1526-1545
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ISSN:0278-0070
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Container-title:IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
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language:
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Short-container-title:IEEE Trans. Comput.-Aided Des. Integr. Circuits Syst.
Author:
Chuan-Hua Chang ,Davidson E.S.,Sakallah K.A.
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Computer Graphics and Computer-Aided Design,Software
Cited by
1 articles.
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1. Some experiments about wave pipelining on FPGA's;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;1998-06