Design Exploration of RISC-V Soft-Cores through Speculative High-Level Synthesis
Author:
Affiliation:
1. Univ Rennes, Inria, CNRS, IRISA
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9973804/9974184/09974478.pdf?arnumber=9974478
Reference15 articles.
1. Automatic Pipelining From Transactional Datapath Specifications
2. Generating interlocked instruction pipelines from specifications of instruction sets
3. Correct-by-construction microarchitectural pipelining
4. HL5: A 32-bit RISC-V Processor Designed with High-Level Synthesis
5. Dynamic Hazard Resolution for Pipelining Irregular Loops in High-Level Synthesis
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