Analysis, Design, and Hardware Implementation of Three, Five, and Seven-level H-bridge Inverter Using Arduino
Author:
Affiliation:
1. Texas Tech University,Department of Electrical and Computer Engineering,Lubbock,USA
Funder
National Science Foundation (NSF)
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10197650/10197677/10197745.pdf?arnumber=10197745
Reference23 articles.
1. A Review on Multilevel Inverter Topologies
2. Power balance modulation strategy for hybrid cascaded H-bridge multi-level inverter
3. Comparison of conventional and new cascaded multilevel inverter topologies based on novel indices
4. Power quality evaluation of photovoltaic grid interfaced cascaded H-bridge nine-level multilevel inverter systems using D-STATCOM and UPQC
5. An Efficient Technique to reduce Total Harmonics Distortion in Cascaded H- Bridge Multilevel Inverter
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1. Performance Evaluation of Five and Seven Level H-Bridge Inverter Under Change in Modulation Index by using Hardware - in the - Loop;2023 International Conference on Sustainable Communication Networks and Application (ICSCNA);2023-11-15
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