Double Gate MOSFET and its application for efficient digital circuits
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Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx5/5934630/5941640/05941650.pdf?arnumber=5941650
Cited by 4 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. The role of process and geometrical parameters of gate stack Inverted-T shape junction less FET at 20 nm technology node;Micro and Nanostructures;2024-09
2. Gain Analysis of Prototyped Wilson Current Mirror Using Double-Gate MOSFET;2023 20th International Multi-Conference on Systems, Signals & Devices (SSD);2023-02-20
3. Design of Low-Power 10T Full Adder Circuit using DG—MOSFET at 180 nm Technology;Lecture Notes in Electrical Engineering;2022-07-12
4. DESIGN OF LOW POWER 14T FULL ADDER CELL USING DOUBLE GATE MOSFET WITH MTCMOS REDUCTION TECHNIQUE AT 45 NANOMETER TECHNOLOGY;International Journal of Nanoscience;2013-12
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