A Floating-Point 6T SRAM In-Memory-Compute Macro Using Hybrid-Domain Structure for Advanced AI Edge Chips-Reference-Cited by-同舟云学术

A Floating-Point 6T SRAM In-Memory-Compute Macro Using Hybrid-Domain Structure for Advanced AI Edge Chips

Published:2024-01 Issue:1 Volume:59 Page:196-207
ISSN:0018-9200
Container-title:IEEE Journal of Solid-State Circuits
language:
Short-container-title:IEEE J. Solid-State Circuits

Author:

Wu Ping-Chun¹,Su Jian-Wei²^ORCID,Hong Li-Yang¹,Ren Jin-Sheng³,Chien Chih-Han³,Chen Ho-Yu¹,Ke Chao-En³,Hsiao Hsu-Ming²,Li Sih-Han²^ORCID,Sheu Shyh-Shyuan²,Lo Wei-Chung²,Chang Shih-Chieh²,Lo Chung-Chuan⁴,Liu Ren-Shuo³^ORCID,Hsieh Chih-Cheng³^ORCID,Tang Kea-Tiong³^ORCID,Chang Meng-Fan³^ORCID

Affiliation:

1. Institute of Electronic Engineering, National Tsing Hua University (NTHU), Hsinchu, Taiwan

2. Industrial Technology Research Institute (ITRI), Hsinchu, Taiwan

3. Department of ElectricalEngineering, National Tsing Hua University (NTHU), Hsinchu, Taiwan

4. Institute of Systems Neuroscience, National Tsing Hua University (NTHU), Hsinchu, Taiwan

Funder

Industrial Technology Research Institute

National Science and Technology Council (NSTC)-Taiwan

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering