An 88.9-dB SNR Fully-Dynamic Noise-Shaping SAR Capacitance-to-Digital Converter-Reference-Cited by-同舟云学术

An 88.9-dB SNR Fully-Dynamic Noise-Shaping SAR Capacitance-to-Digital Converter

Published:2022-09 Issue:9 Volume:57 Page:2778-2790
ISSN:0018-9200
Container-title:IEEE Journal of Solid-State Circuits
language:
Short-container-title:IEEE J. Solid-State Circuits

Author:

Lim Chaegang¹^ORCID,Choi Yohan¹,Song Jaegeun¹^ORCID,Ahn Soonsung¹,Jang Seokwon¹^ORCID,Kim Chulwoo¹^ORCID

Affiliation:

1. Department of Electrical Engineering, Korea University, Seoul, South Korea

Funder

National Research Foundation of Korea (NRF) Grant funded by the Korea Government

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

http://xplorestaging.ieee.org/ielx7/4/9866858/09763882.pdf?arnumber=9763882

Reference35 articles.

1. 15.4b incremental sigma-delta capacitance-to-digital converter with zoom-in 9b asynchronous SAR;oh;Proc Symp VLSI Circuits Dig Tech Papers,2014

2. Advancing Data Weighted Averaging Technique for Multi-Bit Sigma–Delta Modulators

3. A 1.5 mW 68 dB SNDR 80 Ms/s 2 $\times$ Interleaved Pipelined SAR ADC in 28 nm CMOS

4. A 3.68 aFrms resolution 183 dB FoMs $4^{\textrm{th}}$ -order continuous-time bandpass $\Delta\Sigma$ capacitance-to-digital converter in $0.18~\mu\text{m}$ CMOS;park;Proc Symp VLSI Circuits,2021

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