An 18-MS/s 76-dB SNDR Continuous-Time Δ Σ Modulator Incorporating an Input Voltage Tracking GmC Loop Filter
Author:
Affiliation:
1. Chair of Mixed Signal Circuit Design, Technische Universität Berlin, Berlin, Germany
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering
Link
http://xplorestaging.ieee.org/ielx7/4/10192489/10050191.pdf?arnumber=10050191
Reference28 articles.
1. A 0.4-V $G_{m}$ – $C$ Proportional-Integrator-Based Continuous-Time $\Delta\Sigma$ Modulator With 50-kHz BW and 74.4-dB SNDR
2. A low-power Gm-C-based CT-? ? audio-band ADC in 1.1 V 65 nm CMOS;ahmed;Proc IEEE Symp VLSI Circuits,2015
3. A Gm-C Delta-Sigma Modulator With a Merged Input-Feedback Gm Circuit for Nonlinearity Cancellation and Power Efficiency Enhancement
4. A 7.2 mW 75.3 dB SNDR 10 MHz BW CT Delta-Sigma Modulator Using Gm-C-Based Noise-Shaped Quantizer and Digital Integrator
5. A 75 dB SNDR 10-MHz Signal Bandwidth Gm-C-Based Sigma-Delta Modulator With a Nonlinear Feedback Compensation Technique
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1. An Improved DEM for Multibit DT ΣΔMs Based on Poles Splitting Technique and Segmented VQ;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2024-01
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