Multipurpose Deep-Learning Accelerator for Arbitrary Quantization With Reduction of Storage, Logic, and Latency Waste-Reference-Cited by-同舟云学术

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Multipurpose Deep-Learning Accelerator for Arbitrary Quantization With Reduction of Storage, Logic, and Latency Waste

Published:2024-01 Issue:1 Volume:59 Page:143-156
ISSN:0018-9200
Container-title:IEEE Journal of Solid-State Circuits
language:
Short-container-title:IEEE J. Solid-State Circuits

Author:

Moon Seunghyun¹^ORCID,Mun Han-Gyeol²^ORCID,Son Hyunwoo³^ORCID,Sim Jae-Yoon²^ORCID

Affiliation:

1. Institute of Artificial Intelligence, Pohang University of Science and Technology, Pohang, South Korea

2. department of Electrical Engineering, Pohang University of Science and Technology, Pohang, South Korea

3. department of Electronic Engineering, Gyeongsang National University, Jinju, South Korea

Funder

National Research Foundation

Korea Ministry of Science and Information and Communication Technology

POSCO Holdings

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

http://xplorestaging.ieee.org/ielx7/4/10375801/10268412.pdf?arnumber=10268412

Reference40 articles.

1. DSPU: An Efficient Deep Learning-Based Dense RGB-D Data Acquisition With Sensor Fusion and 3-D Perception SoC

2. An Energy-Efficient Transformer Processor Exploiting Dynamic Weak Relevances in Global Attention

3. Bottleneck-Stationary Compact Model Accelerator With Reduced Requirement on Memory Bandwidth for Edge Applications

4. MobileNets: Efficient convolutional neural networks for mobile vision applications;Howard;arXiv:1704.04861,2017

5. Deep residual learning for image recognition;He;arXiv:1512.03385,2015

Cited by 1 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. CLUT-CIM: A Capacitance Lookup Table-Based Analog Compute-in-Memory Macro With Signed-Channel Training and Weight Updating for Nonuniform Quantization;IEEE Transactions on Circuits and Systems I: Regular Papers;2024

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