A Fully Integrated 490-GHz CMOS Receiver Adopting Dual-Locking Receiver-Based FLL-Reference-Cited by-同舟云学术

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A Fully Integrated 490-GHz CMOS Receiver Adopting Dual-Locking Receiver-Based FLL

Published:2022-09 Issue:9 Volume:57 Page:2626-2639
ISSN:0018-9200
Container-title:IEEE Journal of Solid-State Circuits
language:
Short-container-title:IEEE J. Solid-State Circuits

Author:

Choi Kyung-Sik¹^ORCID,Kim Keun-Mok¹^ORCID,Utomo Dzuhri Radityo²^ORCID,Lee In-Young³^ORCID,Lee Sang-Gug¹^ORCID

Affiliation:

1. School of Electrical Engineering, Korea Advanced Institute of Science and Technology (KAIST), Daejeon, Republic of Korea

2. Department of Electrical and Information Engineering, Universitas Gadjah Mada (UGM), Yogyakarta, Indonesia

3. Department of Electronic Engineering, Chosun University, Gwangju, Republic of Korea

Funder

Institute of Information & Communications Technology Planning & Evaluation

Ministry of Science and ICT (MSIT), Korea Government

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

http://xplorestaging.ieee.org/ielx7/4/9866858/09743280.pdf?arnumber=9743280

Reference53 articles.

1. A 3.125-Gb/s clock and data recovery circuit for the 10-Gbase-LX4 Ethernet

2. Frequency Detectors for PLL Acquisition in Timing and Carrier Recovery

3. A Silicon-Based 0.3 THz Frequency Synthesizer With Wide Locking Range

4. A 283-GHz Fully Integrated Phase-Locked Loop Based on 65-nm CMOS

5. A Fully Integrated 0.27-THz Injection-Locked Frequency Synthesizer With Frequency-Tracking Loop in 65-nm CMOS

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1. A D-Band Low-Noise and High-Gain Receiver Front-End Adopting G_max-Driven Active Mixer;IEEE Transactions on Microwave Theory and Techniques;2024-09

2. A 0.68-THz Receiver With Third-Order Subharmonic Mixing in 65-nm CMOS;IEEE Journal of Solid-State Circuits;2024-08

3. Ultrawideband Distributed Amplifier With Positive Feedback and Intrastack Coupling;IEEE Journal of Solid-State Circuits;2024

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