A 2×56 Gb/s 0.78-pJ/b PAM-4 Crosstalk Cancellation Receiver With Active Crosstalk Extraction Technique in 28-nm CMOS-Reference-Cited by-同舟云学术

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A 2×56 Gb/s 0.78-pJ/b PAM-4 Crosstalk Cancellation Receiver With Active Crosstalk Extraction Technique in 28-nm CMOS

Published:2024-09 Issue:9 Volume:59 Page:3008-3020
ISSN:0018-9200
Container-title:IEEE Journal of Solid-State Circuits
language:
Short-container-title:IEEE J. Solid-State Circuits

Author:

Zhong Liping¹^ORCID,Wu Hongzhi¹,Wu Weitao¹,Wang Catherine¹,Xiao Wenbo¹^ORCID,Luo Xiongshi¹^ORCID,Zhang Yangyi¹^ORCID,Xu Dongfan¹,Wang Wei¹^ORCID,Fan Taiyang¹,Li Zhenghao¹^ORCID,Cheng Xuxu¹,Pan Quan¹^ORCID

Affiliation:

1. School of Microelectronics, Southern University of Science and Technology, Shenzhen, China

Funder

National Natural Science Foundation of China

Pearl River Talent Program

National Key Research and Development Program

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Link

http://xplorestaging.ieee.org/ielx7/4/10648889/10500691.pdf?arnumber=10500691

Reference25 articles.

1. 8.1 A 224Gb/s DAC-Based PAM-4 Transmitter with 8-Tap FFE in 10nm CMOS

2. A 1.41pJ/b 224Gb/s PAM-4 SerDes Receiver with 31dB Loss Compensation

3. A 21-Gb/s 87-mW Transceiver With FFE/DFE/Analog Equalizer in 65-nm CMOS Technology

4. Design of 56 Gb/s NRZ and PAM4 SerDes Transceivers in CMOS Technologies

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