Low Thermal Budget Reconfigurable Fully Depleted Silicon on Insulator Field-Effect-Transistors With Embedded Boolean Logic
Author:
Affiliation:
1. Emerging Device and Chip Laboratory, Hangzhou Institute of Technology, Xidian University, Hangzhou, China
2. School of Microelectronics, Shanghai University, Shanghai, China
Funder
National Key Research and Development Project
National Natural Science Foundation of China
“Pioneer” Research and Development Program of Zhejiang
Key Research Project of Zhejiang Laboratory
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering,Electronic, Optical and Magnetic Materials
Link
http://xplorestaging.ieee.org/ielx7/55/10027614/09984161.pdf?arnumber=9984161
Reference25 articles.
1. Total-Ionizing-Dose Effects on 3D Sequentially Integrated, Fully Depleted Silicon-on-Insulator MOSFETs
2. First demonstration of a CMOS over CMOS 3D VLSI CoolCubeTM integration on 300 mm wafers;brunet;Proc Symp VLSI Technol,2016
3. Monolithic 3D Integration of High Endurance Multi-Bit Ferroelectric FET for Accelerating Compute-In-Memory
4. Low-Temperature Wafer Bonding for Three-Dimensional Wafer-Scale Integration
5. Vertically Integrated Reconfigurable Nanowire Arrays
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