CADRE: Cycle-Accurate Deterministic Replay for Hardware Debugging
Author:
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx5/10881/34248/01633519.pdf?arnumber=1633519
Cited by 28 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Survey on Redundancy Based-Fault tolerance methods for Processors and Hardware accelerators - Trends in Quantum Computing, Heterogeneous Systems and Reliability;ACM Computing Surveys;2024-06-28
2. On-Chip Error Detection Reusing Built-In Self-Repair for Silicon Debug;IEEE Access;2021
3. A Methodology to Capture Fine-Grained Internal Visibility During Multisession Silicon Debug;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2020-04
4. 32-Bit One Instruction Core: A Low-Cost, Reliable, and Fault-Tolerant Core for Multicore Systems;Journal of Testing and Evaluation;2019-01-31
5. Test Resource Reused Debug Scheme to Reduce the Post-Silicon Debug Cost;IEEE Transactions on Computers;2018-12-01
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