Author:
Aldacher Muhammad,Nasrollahpour Mehdi,Hamedi-hagh Sotoudeh
Cited by
7 articles.
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1. Design and Analysis of SAR-ADC for Low Power Circuits;2024 IEEE International Conference on Information Technology, Electronics and Intelligent Communication Systems (ICITEICS);2024-06-28
2. Review on High-Speed Dynamic Comparators for Analog to Digital Converters;Journal of Circuits, Systems and Computers;2024-03-14
3. A Fully Synthesizable Dynamic Latched Comparator with Reduced Kickback Noise;2022 IEEE International Symposium on Circuits and Systems (ISCAS);2022-05-28
4. A 0.8-V, 2.88-GHz Double-Tail Latched Comparator in 22-nm FDSOI CMOS Technology;2021 IEEE Nordic Circuits and Systems Conference (NorCAS);2021-10-26
5. Design of 150‐μV input‐referred voltage 1‐GHz comparison frequency dual offset cancelation comparator for pH biomarker system‐on‐chip;International Journal of Circuit Theory and Applications;2021-10-22