Steep Sub-threshold Slope Si and InGaAs Dopingless TFET: TCAD and ADS Simulation Based Investigation for Digital/Analog Applications-Reference-Cited by-同舟云学术

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Steep Sub-threshold Slope Si and InGaAs Dopingless TFET: TCAD and ADS Simulation Based Investigation for Digital/Analog Applications

Published:2022-12-23 Issue: Volume: Page:
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Container-title:2022 International Conference on Smart Generation Computing, Communication and Networking (SMART GENCON)
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Author:

Sharma Monika¹,Narang Rakhi²,Saxena Manoj³,Gupta Mridula¹

Affiliation:

1. University of Delhi, South Campus,Semiconductor Device Research Laboratory,Department of Electronic Science,New Delhi,India,110021

2. Sri Venkateswara College, University of Delhi,Department of Electronics,New Delhi,India,110021

3. Deen Dayal Upadhyaya College, University of Delhi,Department of Electronics,New Delhi,India,110078

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/10083316/10083513/10084292.pdf?arnumber=10084292

Reference32 articles.

1. Impact of spacer-Drain work function Engineered on the characteristics of a Si-Ge Dopingless Tunnel Field Effect Transistor with lower Sub threshold Swing;chauhan;2017 2nd IEEE International Conference on Recent Trends in Electronics Information & Communication Technology (RTEICT),2017

2. Dopingless tunnel FET with a hetero-material gate: Design and analysis

3. Study of analog performance of common source amplifier using rectangular core–shell based double gate junctionless transistor

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