A 14-Bit, 1-ps resolution, two-step ring and 2D Vernier TDC in 130nm CMOS technology-Reference-Cited by-同舟云学术

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A 14-Bit, 1-ps resolution, two-step ring and 2D Vernier TDC in 130nm CMOS technology

Published:2017-09 Issue: Volume: Page:
ISSN:
Container-title:ESSCIRC 2017 - 43rd IEEE European Solid State Circuits Conference
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Author:

Wang Hechen,Dai Fa Foster

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/8061155/8094509/08094546.pdf?arnumber=8094546

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3. Design of high-resolution and wide-range time-to-digital converter;Eighth International Conference on Electronic Technology and Information Science (ICETIS 2023);2023-06-20

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