Dual-V<inf>T</inf> 4kb sub-V<inf>T</inf> memories with <1 pW/bit leakage in 65 nm CMOS-Reference-Cited by-同舟云学术

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Dual-VT 4kb sub-VT memories with <1 pW/bit leakage in 65 nm CMOS

Published:2013-09 Issue: Volume: Page:
ISSN:
Container-title:2013 Proceedings of the ESSCIRC (ESSCIRC)
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Author:

Andersson Oskar,Mohammadi Babak,Meinerzhagen Pascal,Burg Andreas,Rodrigues Joachim Neves

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/6641026/6649054/06649106.pdf?arnumber=6649106

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