Design and Implementation of a Rail-to-Rail 460-kS/s 10-bit SAR ADC for the Power-Efficient Capacitance Measurement-Reference-Cited by-同舟云学术

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Design and Implementation of a Rail-to-Rail 460-kS/s 10-bit SAR ADC for the Power-Efficient Capacitance Measurement

Published:2015-04 Issue:4 Volume:64 Page:888-901
ISSN:0018-9456
Container-title:IEEE Transactions on Instrumentation and Measurement
language:
Short-container-title:IEEE Trans. Instrum. Meas.

Author:

Shenjie Wang ,Dehollain Catherine

Funder

European FP7 Programme through the Marie Curie Project FlexSMELL

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Instrumentation

Link

http://xplorestaging.ieee.org/ielx7/19/7055943/06949145.pdf?arnumber=6949145

Cited by 9 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. A Programmable Delay-Controlling Technique for PVT Enhancement of Asynchronous SAR ADC;2022 7th International Conference on Integrated Circuits and Microsystems (ICICM);2022-10-28

2. A Review on Multiparameter Sensor Design for Biomedical SoC Applications;Advances in Intelligent Systems and Computing;2022-09-30

3. A Closed-Loop Capacitance-to-Frequency Converter for Single-Element and Differential Capacitive Sensors;IEEE Transactions on Instrumentation and Measurement;2020-11

4. Energy-efficient DAC switching technique for single-ended SAR ADCs;AEU - International Journal of Electronics and Communications;2020-09

5. Design Of Sar-Adc Based Mixed Signal Architecture For Low Power Application;2019 5th International Conference on Advanced Computing & Communication Systems (ICACCS);2019-03

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