A Multi-mode Convolution Coprocessor Based on RISC-V Instruction Set Architecture
Author:
Affiliation:
1. Nanjing University of Aeronautics and Astronautics,College of Electronic and Information Engineering,Nanjing,China,211106
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10395907/10395930/10396531.pdf?arnumber=10396531
Reference11 articles.
1. A CNN Hardware Accelerator Designed for YOLO Algorithm Based on RISC-V SoC
2. Beans Leaf Diseases Classification Using MobileNet Models
3. Research on Lip Recognition Algorithm Based on Optimized MobileNet
4. Smart Gravimetric System for Enhanced Security of Accesses to Public Places Embedding a MobileNet Neural Network Classifier
5. A New Hardware-Efficient VLSI-Architecture of GoogLeNet CNN-Model Based Hardware Accelerator for Edge Computing Applications
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