High-Level Design of a 14-bit Continuous-Time Sigma-Delta Modulator with FIR DAC for Low-Voltage Audio Devices-Reference-Cited by-同舟云学术

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High-Level Design of a 14-bit Continuous-Time Sigma-Delta Modulator with FIR DAC for Low-Voltage Audio Devices

Published:2022-08-22 Issue: Volume: Page:
ISSN:
Container-title:2022 35th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems Design (SBCCI)
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Author:

Cortez Matheus¹,Girardi Alessandro G.¹,De Aguirre Paulo Cesar C.¹

Affiliation:

1. Federal University of Pampa - UNIPAMPA,Computer Architecture and Microelectronics Group - GAMA,Alegrete,Brazil

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/9893151/9893215/09893239.pdf?arnumber=9893239

Reference15 articles.

1. $\Sigma\ \Delta$ ADC with finite impulse response feedback DAC;putter;Digest of Technical Papers - IEEE International Solid-State Circuits Conference,0

2. Understanding Delta-Sigma Data Converters

3. A 4th-Order Continuous-Time SD Modulator with Improved Clock Jitter Immunity using RTZ FIR DAC;assom;2018 25th IEEE International Conference on Electronics Circuits and Systems (ICECS),0

Cited by 2 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. A Low-Power 4-Bit 20-MS/s Flash ADC in 65-nm CMOS with Rail-to-Rail Comparators;2024 Argentine Conference on Electronics (CAE);2024-03-07

2. A 1.8V 109.3 dB SNDR Continuous Time Sigma-Delta Modulator for Audio Applications;2023 8th International Conference on Integrated Circuits and Microsystems (ICICM);2023-10-20

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