High-Throughput Multifilter VLSI Design for the AV1 Fractional Motion Estimation

Author:

Freitas Daiane1,Nagai Bruna2,Grellert Mateus2,Diniz Claudio M.3,Correa Guilherme1

Affiliation:

1. Graduate Program in Computing (PPGC), Federal University of Pelotas (UFPel),Video Technology Research Group (ViTech)

2. Federal University of Santa Catarina (UFSC),Embedded Computing Lab (ECL)

3. Institute of Informatics (INF), Federal University of Rio Grande do Sul (UFRGS),PGMICRO

Publisher

IEEE

Reference22 articles.

1. The Thor Video Codec

2. Complexity-scalable HEVC encoding

3. AV1 bitstream & decoding process specification. version 1.0.0 with errata 1;de rivaz;Alliance for Open Media,2018

4. Block-based motion estimation algorithms — a survey

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1. AV1 Residual Syntax Elements Assessment and Efficient VLSI Architecture;2023 36th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems Design (SBCCI);2023-08-28

2. Energy and Computing Assessment of Video Processing Kernels on CPU and FPGA platforms;2023 36th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems Design (SBCCI);2023-08-28

3. Multiversion Low-Power Hardware Accelerator for the AV1 Interpolation Filters;2023 IEEE International Symposium on Circuits and Systems (ISCAS);2023-05-21

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