A 23-pW NMOS-Only Voltage Reference With Optimum Body Selection for Process Compensation

Author:

Yu Kai1ORCID,Zhou Yangrun1,Li Sizhen1ORCID,Huang Mo2ORCID

Affiliation:

1. School of Integrated Circuits, School of Information Engineering, Guangdong University of Technology, Guangzhou, China

2. Department of Electrical and Computer Engineering, State Key Laboratory of Analog and Mixed-Signal VLSI, Faculty of Science and Technology, Institute of Microelectronics, University of Macau, Macau, China

Funder

National Key Research and Development Program of China

National Natural Science Foundation of China

Natural Science Foundation of Guangdong Province

Science and Technology Development Fund, Macau SAR

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Cited by 13 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. A Sub-nW Temperature Invariant Voltage Reference in a Unipolar TFT-based Flexible IC Technology;2024 IEEE International Conference on Flexible and Printable Sensors and Systems (FLEPS);2024-06-30

2. On-chip Built-In Self-Calibration of Thermal Variations for Mixed-Signal In-Memory Computing;2024 IEEE European Test Symposium (ETS);2024-05-20

3. A Dual Mode All NMOS 7-T Temperature Sensor and Voltage Reference for Biomedical Applications;2024 IEEE International Symposium on Circuits and Systems (ISCAS);2024-05-19

4. A 353pW, 0.014%/V line sensitivity self-biased CMOS voltage reference with source degeneration active load;IEICE Electronics Express;2024-01-25

5. A 146pW, 0.4V, 0.015%/V Line Sensitivity, High PSRR Leakage-Biased CMOS Voltage Reference with the Optimization of Body Parasitic Effects;2024 4th International Conference on Consumer Electronics and Computer Engineering (ICCECE);2024-01-12

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