A high-performance/low-latency vector rotational CORDIC architecture based on extended elementary angle set and trellis-based searching schemes-Reference-Cited by-同舟云学术

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A high-performance/low-latency vector rotational CORDIC architecture based on extended elementary angle set and trellis-based searching schemes

Published:2003-09 Issue:9 Volume:50 Page:589-601
ISSN:1057-7130
Container-title:IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing
language:en
Short-container-title:IEEE Trans. Circuits Syst. II

Author:

Cheng-Shing Wu ,An-Yeu Wu ,Chih-Hsiu Lin

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Signal Processing

Link

http://xplorestaging.ieee.org/ielx5/82/27616/01232533.pdf?arnumber=1232533

Cited by 41 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. CORDIC-Based Computation of Arcsine and Arccosine Functions on FPGA;IEEE Transactions on Circuits and Systems II: Express Briefs;2023-09

2. An Efficient Scaling-Free Folded Hyperbolic CORDIC Design Using a Novel Low-Complexity Power-of-2 Taylor Series Approximation;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2023-08

3. Study of Iterations Reduction for CORDIC Computation with More Accuracy;2023 International Conference on Consumer Electronics - Taiwan (ICCE-Taiwan);2023-07-17

4. Design and FPGA Implementation of Pre-computation Based Radix-4 Hyperbolic CORDIC for Direct Digital Synthesis;Journal of Signal Processing Systems;2023-06

5. VLSI Design of Pipelined FFT Architecture for DSP Application;2023 7th International Conference on Computing Methodologies and Communication (ICCMC);2023-02-23

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