Design Methodology for a Wideband, Low Insertion Loss, Digital Step Attenuator in SiGe BiCMOS Technology-Reference-Cited by-同舟云学术

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Design Methodology for a Wideband, Low Insertion Loss, Digital Step Attenuator in SiGe BiCMOS Technology

Published:2021 Issue: Volume: Page:1-1
ISSN:1549-7747
Container-title:IEEE Transactions on Circuits and Systems II: Express Briefs
language:
Short-container-title:IEEE Trans. Circuits Syst. II

Author:

Cheon Clifford D.,Rao Sunil G.,Lim Wonsub,Cardoso Adilson S.,Cho Moon-Kyu,Cressler John D.

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

http://xplorestaging.ieee.org/ielx7/8920/4358609/09531940.pdf?arnumber=9531940

Cited by 8 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. An S–K Band 6-Bit Digital Step Attenuator with Ultra Low Insertion Loss and RMS Amplitude Error in 0.25 μm GaAs p-HEMT Technology;Applied Sciences;2024-05-01

2. A 10–20 GHz 6-Bit High-Accuracy Digital Step Attenuator with Low Insertion Loss in 0.15 µm GaAs p-HEMT Technology;Micromachines;2023-12-30

3. A 33.5–37.5-GHz Four-Element Phased-Array Transceiver Front-End With Hybrid Architecture Phase Shifters and Gain Controllers;IEEE Transactions on Microwave Theory and Techniques;2023-09

4. A Wideband Low-Loss CMOS Attenuator With dB-Linear Gain Tuning for W-Band Applications;IEEE Transactions on Circuits and Systems II: Express Briefs;2023-09

5. A DC-87.8-GHz Switched-Type Attenuator With Switched Capacitor Branch in 40-nm CMOS;IEEE Transactions on Circuits and Systems II: Express Briefs;2023-09

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