A 0.52 μW, 38 nV/√Hz Chopper Amplifier With a Low-Noise DC Servo Loop, an Embedded Ripple Reduction Loop, and a Squeezed Inverter Stage
Author:
Funder
National Research Foundation of Korea
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering
Link
http://xplorestaging.ieee.org/ielx7/8920/9442945/09296834.pdf?arnumber=9296834
Cited by 11 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. A low noise CLASS AB operational amplifier with high voltage output capability by 180 nm BCD process;Journal of Physics: Conference Series;2024-07-01
2. A −64.3 dB THD, 26 nV/√ Hz Bio-Potential Readout Analog-Front-End Amplifier With a Gm-C Integrator-Implanted DC Servo Loop, and a Bulk-Driven Ripple Reduction Loop;IEEE Transactions on Circuits and Systems I: Regular Papers;2024-02
3. Noise Analysis and Design Methodology of Chopper Amplifiers With Analog DC-Servo Loop for Biopotential Acquisition Applications;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2024-01
4. A Low Noise 10-Bit 59.41dB SNR SAR ADC Using Chopper Comparator for Biomedical Applications;Lecture Notes in Networks and Systems;2024
5. A Capacitively Coupled Chopper Instrumentation Amplifier With Compensated Auto-Zeroed DC Servo-Loop for Neural Signal Recording;IEEE Transactions on Circuits and Systems II: Express Briefs;2023-12
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