A 36.2 dB High SNR and PVT/Leakage-Robust eDRAM Computing-In-Memory Macro With Segmented BL and Reference Cell Array-Reference-Cited by-同舟云学术

A 36.2 dB High SNR and PVT/Leakage-Robust eDRAM Computing-In-Memory Macro With Segmented BL and Reference Cell Array

Published:2022-05 Issue:5 Volume:69 Page:2433-2437
ISSN:1549-7747
Container-title:IEEE Transactions on Circuits and Systems II: Express Briefs
language:
Short-container-title:IEEE Trans. Circuits Syst. II

Author:

Ha Sangwoo¹^ORCID,Kim Sangjin¹^ORCID,Han Donghyeon¹^ORCID,Um Soyeon¹^ORCID,Yoo Hoi-Jun¹^ORCID

Affiliation:

1. School of Electrical Engineering, Korea Advanced Institute of Science and Technology, Daejeon, South Korea

Funder

Institute of Information & Communications Technology Planning & Evaluation

Korea Government

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

http://xplorestaging.ieee.org/ielx7/8920/9766072/09736994.pdf?arnumber=9736994

Reference15 articles.

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3. A low power in-memory multiplication and accumulation array with modified radix-4 input and canonical signed digit weights;xiao;arXiv 2101 02419,2021

4. 33.2 A Fully Integrated Analog ReRAM Based 78.4TOPS/W Compute-In-Memory Chip with Fully Parallel MAC Computing

5. Learning multiple layers of features from tiny images;krizhevsky,2009

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