A 0.4-to-1 V Voltage Scalable $\Delta \Sigma $ ADC With Two-Step Hybrid Integrator for IoT Sensor Applications in 65-nm LP CMOS

Author:

Park Jun-Eun,Hwang Young-Ha,Jeong Deog-KyoonORCID

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Cited by 23 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

1. Discrete-Time Delta-Sigma Modulator with Successively Approximating Register ADC Assisted Analog Feedback Technique;Circuits, Systems, and Signal Processing;2024-09-12

2. Inverter-Based Amplifier with Active Frequency Compensation and Adaptive Voltage Scaling;2024 IEEE International Symposium on Circuits and Systems (ISCAS);2024-05-19

3. A Novel Approach for Realizing Loop-Filter in Low-Distortion Noise-Coupled ΣΔ Modulators;Journal of Circuits, Systems and Computers;2024-04-04

4. A 0.6-to-1.2 V Scaling-Friendly Discrete-Time OTA-Free Linear VCO-Based ΔΣ ADC Suitable for DVFS;IEEE Transactions on Circuits and Systems I: Regular Papers;2024-04

5. An Area/Power-Efficient ΔΣ Modulator Based on Dynamic-Boost Inverter for Multichannel Sensor Applications;IEEE Transactions on Very Large Scale Integration (VLSI) Systems;2023-09

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