A Discrete-Time Input $\Delta\Sigma$ ADC Architecture Using a Dual-VCO-Based Integrator
Author:
Publisher
Institute of Electrical and Electronics Engineers (IEEE)
Subject
Electrical and Electronic Engineering
Link
http://xplorestaging.ieee.org/ielx5/8920/5638302/05606195.pdf?arnumber=5606195
Cited by 6 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. VCO-Based ADC With Built-In Supply Noise Immunity Using Injection-Locked Ring Oscillators;IEEE Transactions on Circuits and Systems II: Express Briefs;2019-07
2. A Highly Digital ADC With Enhanced Accuracy Using a Simple Ripple-Transferring Replica Pseudo PLL Technique;IEEE Transactions on Circuits and Systems II: Express Briefs;2019-02
3. A 6-b, 800-MS/s, 3.62-mW Nyquist Rate AC-Coupled VCO-Based ADC in 65-nm CMOS;IEEE Transactions on Circuits and Systems I: Regular Papers;2017-06
4. A PSRR Enhancing Method for GRO TDC Based Clock Generation Systems;IEEE Transactions on Circuits and Systems I: Regular Papers;2014-03
5. Design techniques for time-mode noise-shaping analog-to-digital converters: a state-of-the-art review;Analog Integrated Circuits and Signal Processing;2014-02-27
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