A 10-MS/s-to-100-kS/s Power-Scalable Fully Differential CBSC 10-Bit Pipelined ADC With Adaptive Biasing-Reference-Cited by-同舟云学术

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A 10-MS/s-to-100-kS/s Power-Scalable Fully Differential CBSC 10-Bit Pipelined ADC With Adaptive Biasing

Published:2010-01 Issue:1 Volume:57 Page:11-15
ISSN:1549-7747
Container-title:IEEE Transactions on Circuits and Systems II: Express Briefs
language:
Short-container-title:IEEE Trans. Circuits Syst. II

Author:

Mu-Chen Huang ,Shen-Iuan Liu

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering

Link

http://xplorestaging.ieee.org/ielx5/8920/5393271/05382580.pdf?arnumber=5382580

Cited by 10 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Enhanced comparator‐based switched‐capacitor integrator using current conveyor;International Journal of Numerical Modelling: Electronic Networks, Devices and Fields;2020-02-11

2. A 10-bit 1 MS/s segmented Dual-Sampling SAR ADC with reduced switching energy;Microelectronics Journal;2017-12

3. Event‐driven detection method based on pseudo‐differential self‐timed inverter‐based incremental sigma‐delta analogue‐to‐digital converter;IET Circuits, Devices & Systems;2017-03-07

4. A low-power, reconfigurable, pipelined ADC for implantable bioimpedance measurement system with vertically aligned carbon nanofibers (VACNF) electrodes;Analog Integrated Circuits and Signal Processing;2016-07-21

5. New fully-differential amplifier-less pipelined ADC with wide power scalability and ERBW;Analog Integrated Circuits and Signal Processing;2014-07-15

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