Optimal combined word-length allocation and architectural synthesis of digital signal processing circuits-Reference-Cited by-同舟云学术

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Optimal combined word-length allocation and architectural synthesis of digital signal processing circuits

Published:2006-05 Issue:5 Volume:53 Page:339-343
ISSN:1057-7130
Container-title:IEEE Transactions on Circuits and Systems II: Express Briefs
language:
Short-container-title:IEEE Trans. Circuits Syst. II

Author:

Caffarena G.,Constantinides G.A.,Cheung P.Y.K.,Carreras C.,Nieto-Taladriz O.

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Signal Processing

Link

http://xplorestaging.ieee.org/ielx5/8920/34232/01632340.pdf?arnumber=1632340

Cited by 14 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Wordlength Optimization of Fixed-Point Algorithms;Approximate Computing Techniques;2022

2. A new multi-objective mathematical model for the high-level synthesis of integrated circuits;Applied Mathematical Modelling;2016-02

3. Enhanced Precision Analysis for Accuracy-Aware Bit-Width Optimization Using Affine Arithmetic;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2013-12

4. High-Level Synthesis under Fixed-Point Accuracy Constraint;Journal of Electrical and Computer Engineering;2012

5. Fast Fixed-Point Optimization of DSP Algorithms;VLSI-SoC: Forward-Looking Trends in IC and Systems Design;2012

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