FPGA Design and Implementation of Approximate Radix-8 Booth Multiplier
Author:
Affiliation:
1. Vishnu Institute of Technology,Electronics and Communication Engineering,Bhimavaram,India
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx8/10548017/10548035/10548931.pdf?arnumber=10548931
Reference16 articles.
1. Implementation and Comparison of Radix-8 Booth Multiplier by using 32-bit Parallel prefix adders for High Speed Arithmetic Applications
2. Small-Area and Low-Power FPGA-Based Multipliers using Approximate Elementary Modules
3. Booth Encoding-Based Energy Efficient Multipliers for Deep Learning Systems
4. Area and Power Efficient Truncated Booth Multipliers Using Approximate Carry-Based Error Compensation
5. Simplified Compressor and Encoder Designs for Low-Cost Approximate Radix-4 Booth Multiplier
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