Energy Efficiency Enhancement Of Parallelized Implementation of NIST Lightweight Cryptography Standardization Finalists-Reference-Cited by-同舟云学术

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Energy Efficiency Enhancement Of Parallelized Implementation of NIST Lightweight Cryptography Standardization Finalists

Published:2022-05-28 Issue: Volume: Page:
ISSN:
Container-title:2022 IEEE International Symposium on Circuits and Systems (ISCAS)
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Author:

Elsadek Islam¹,Aftabjahani Sohrab²,Gardner Doug³,MacLean Erik³,Wallrabenstein John Ross³,Tawfik Eslam Yahya¹

Affiliation:

1. The Ohio State University,Department of Electrical and Computer Engineering

2. Intel Corporation

3. Analog Devices, Inc.

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/9937201/9937203/09937755.pdf?arnumber=9937755

Reference7 articles.

1. AES Crypto Chip Utilizing High-Speed Parallel Pipelined Architecture

2. ISAP v2;dobraunig;Submission to the NIST LWC standardization process,2021

3. Elephant v2;beyne;Submission to the NIST LWC standardization process,2021

4. PHOTON-Beetle Authenticated Encryption and Hash Family;bao;Submission to the NIST LWC standardization process,2021

Cited by 2 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. Optimizing ASCON Permutation in Multi-Clock Domains with Chisel: Resource Efficiency and Critical Path Reduction;2024 IEEE 17th Dallas Circuits and Systems Conference (DCAS);2024-04-19

2. Assessment of Lightweight Cryptography Algorithms on ARM Cortex-M Processors;2023 36th SBC/SBMicro/IEEE/ACM Symposium on Integrated Circuits and Systems Design (SBCCI);2023-08-28

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