Design of A New Memristive-Based Architecture Using VTM Method
Author:
Affiliation:
1. University of Windsor,Department of Electrical and Computer Engineering,Windsor,Ontario,Canada
2. Carleton University,Department of Electronics,Ottawa,Ontario,Canada
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9937201/9937203/09937446.pdf?arnumber=9937446
Reference20 articles.
1. Functionally Complete Boolean Logic in 1T1R Resistive Random Access Memory
2. Realization of Functional Complete Stateful Boolean Logic in Memristive Crossbar
3. Reprogrammable logic in memristive crossbar for in-memory computing
4. On the Implementation of Computation-in-Memory Parallel Adder
5. High-Throughput Pattern Matching With CMOL FPGA Circuits: Case for Logic-in-Memory Computing
Cited by 2 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. Design and Implementation of Full Adder Circuit Based on VTM-Logic Gates;2023 IEEE 66th International Midwest Symposium on Circuits and Systems (MWSCAS);2023-08-06
2. A Programmable Circuit Based on the Combination of VTM Cellular Crossbars;2023 19th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD);2023-07-03
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