A 0.9-Nyquist-Band Digital Timing Mismatch Correction for Time-Interleaved ADCs Achieving Delay Tuning Range of 0.12-Sample-Period
Author:
Affiliation:
1. Aalto University,Department of Electronics and Nanoengineering,Espoo,Finland
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9937201/9937203/09937669.pdf?arnumber=9937669
Reference26 articles.
1. A 200MSPS time-interleaved 12-bit ADC system with digital calibration
2. A 12-GS/s 81-mW 5-bit time-interleaved flash ADC with background timing skew calibration
3. A monotonic digitally controlled delay element
4. Noise and Jitter in CMOS Digitally Controlled Delay Lines
5. Impact of Random Channel Mismatch on the SNR and SFDR of Time-Interleaved ADCs
Cited by 2 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. A comprehensive review of time skew background calibration and mitigation techniques in high‐speed time‐interleaved analog‐to‐digital converters;International Journal of Circuit Theory and Applications;2024-06-12
2. A Photonic Time-Interleaved ADC Architecture Based on Optical Clock Distribution and Elector-Optical Modulation Technology;Journal of Nanoelectronics and Optoelectronics;2023-04-01
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