Design of a CMOS Parametric Frequency Divider with 2.4-GHz Output Frequency for RF Systems-on-a-Chip
Author:
Affiliation:
1. Northeastern University,Dept. of Electrical and Computer Engineering,Boston,USA
Funder
National Science Foundation
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9937201/9937203/09937745.pdf?arnumber=9937745
Reference21 articles.
1. A 580- $\mu$ W 2.4-GHz ZigBee Receiver Front End With Transformer Coupling Technique
2. A Sub-1V, 220 μW Receiver Frontend for Wearable Wireless Sensor Network Applications
3. A 0.77 mW 2.4 GHz RF Front-End With $-$4.5 dBm In-Band IIP3 Through Inherent Filtering
4. The modeling, analysis, and design of filter-based parametric frequency dividers
5. Reflective Parametric Frequency-Selective Limiters With Sub-dB Loss and μWatts Power Thresholds
Cited by 3 articles. 订阅此论文施引文献 订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献
1. A Cryo-CMOS Parametric Frequency Divider With −189.1 dBm/Hz Output Noise Floor at 4.2 K for High-Fidelity All-Parametric Quantum Reflectometer;IEEE Microwave and Wireless Technology Letters;2023-12
2. Invited: An Active Filter Balun and Frequency Doubler for Parametric Phase Noise Reduction Systems;2023 IEEE 66th International Midwest Symposium on Circuits and Systems (MWSCAS);2023-08-06
3. Design and Analysis of an On-Chip Current-Driven CMOS Parametric Frequency Divider;IEEE Transactions on Circuits and Systems I: Regular Papers;2023-05
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