Redundancy Pruning for Binary Hyperdimensional Computing Architectures
Author:
Affiliation:
1. University of the Philippines,Electrical and Electronics Engineering Institute,Diliman
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/9937201/9937203/09937640.pdf?arnumber=9937640
Reference20 articles.
1. Exploring Hyperdimensional Associative Memory
2. CompHD: Efficient Hyperdimensional Computing Using Model Compression
3. IP-HDC: Information-Preserved Hyperdimensional Computing for Multi-Task Learning
4. Dynamic Hyperdimensional Computing for Improving Accuracy-Energy Efficiency Trade-Offs
5. Classification and Recall With Binary Hyperdimensional Computing: Tradeoffs in Choice of Density and Mapping Characteristics
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2. Energy-Efficient Sparse Hyperdimensional Computing for Speech Recognition;2023 20th International SoC Design Conference (ISOCC);2023-10-25
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