A -10.1dBm IIP3, 0.3-40GHz Receiver Using Hybrid-Path Band-Selection with Reduced LO Coverage Bandwidth Supporting 480Mb/s 4096-QAM and 7.2Gb/s 64-QAM Modulation
Author:
Affiliation:
1. University of Electronic Science and Technology of China
Funder
National Natural Science Foundation of China
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10528947/10528954/10529101.pdf?arnumber=10529101
Reference4 articles.
1. A Power-Efficient 24-to-71 GHz CMOS Phased-Array Receiver Utilizing Harmonic-Selection Technique Supporting 36dB Inter-Band Blocker Rejection for 5G NR
2. A 23–40-GHz Phased-Array Receiver Using 14-Bit Phase-Gain Manager and Wideband Noise-Canceling LNA
3. A 0.4–6 GHz Receiver for Cellular and WiFi Applications
4. A SAW-Less GSM/GPRS/EDGE Receiver Embedded in 65-nm SoC
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