Design of 224Gb/s DSP-Based Transceiver in CMOS Technology: Signal Integrity, Architecture, Circuits, and Packaging-Reference-Cited by-同舟云学术

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Design of 224Gb/s DSP-Based Transceiver in CMOS Technology: Signal Integrity, Architecture, Circuits, and Packaging

Published:2024-04-21 Issue: Volume: Page:1-8
ISSN:
Container-title:2024 IEEE Custom Integrated Circuits Conference (CICC)
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Author:

Kim Jihwan¹,Cohen Ariel¹,Li Mike Peng¹,Balankutty Ajay¹,Kundu Sandipan¹,Khairi Ahmad¹,Krupnik Yoel¹,Segal Yoav¹,Cusmai Marco¹,Lazar Dror¹,Gordon Ari¹,Familia Noam¹,Yu Kai¹,Liu Yutao¹,Beach Matthew¹,Wali Priya¹,Wu Hsinho¹,Shimanouchi Masashi¹,Jiang Jenny Xiaohong¹,Qian Zhiguo¹,Aygun Kemal¹,Levin Itamar¹,O'Mahony Frank¹

Affiliation:

1. Intel Corporation

Publisher

IEEE

Link

http://xplorestaging.ieee.org/ielx7/10528947/10528954/10528970.pdf?arnumber=10528970

Reference24 articles.

1. 112Gb/s PAM4 ADC Based SERDES Receiver for Long-Reach Channels in 10nm Process;Krupnik

2. A 112Gb/s PAM-4 Long-Reach Wireline Transceiver Using a 36-Way Time-Interleaved SAR-ADC and Inverter-Based RX Analog Front-End in 7nm FinFET;Im;ISSCC 2020

3. 6.2 A 460mW 112Gb/s DSP-Based Transceiver with 38dB Loss Compensation for Next-Generation Data Centers in 7nm FinFET Technology

4. 6.3 A 10-to-112Gb/s DSP-DAC-Based Transmitter with 1.2Vppd Output Swing in 7nm FinFET

5. An 8b DAC-based SST TX using metal gate resistors with 1.4pJ/b efficiency at 112Gb/s PAM4 and 8-taps FFE in 7nm CMOS;Kossel;ISSCC 2021

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