A Mixed-Signal Near-Sensor Convolutional Imager SoC with Charge-Based 4b-Weighted 5-to-84-TOPS/W MAC Operations for Feature Extraction and Region-of-Interest Detection
Author:
Affiliation:
1. Université catholique de Louvain (UCLouvain),Belgium
Publisher
IEEE
Link
http://xplorestaging.ieee.org/ielx7/10528947/10528954/10528961.pdf?arnumber=10528961
Reference6 articles.
1. Senputing: An Ultra-Low-Power Always-On Vision Perception Chip Featuring the Deep Fusion of Sensing and Comouting;Xu;TCAS-I,2022
2. A Low-Power Convolutional Neural Network Face Recognition Processor and a CIS Integrated With Always-on Face Detector
3. A 0.5-V Real-Time Computational CMOS Image Sensor With Programmable Kernel for Feature Extraction
4. A 0.8 V Intelligent Vision Sensor With Tiny Convolutional Neural Network and Programmable Weights Using Mixed-Mode Processing-in-Sensor Technique for lmaqe Classification;Hsu;JSSC,2023
5. 7.7 A 0.2-to-3.6TOPS/W Programmable Convolutional Imager SoC with In-Sensor Current-Domain Ternary-Weighted MAC Operations for Feature Extraction and Region-of-Interest Detection
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