Using Differential Execution Analysis to Identify Thread Interference

Author:

Bouksiaa Mohamed Said Mosli,Trahay FrancoisORCID,Lescouet Alexis,Voron Gauthier,Dulong Remi,Guermouche Amina,Brunet Elisabeth,Thomas Gael

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Computational Theory and Mathematics,Hardware and Architecture,Signal Processing

Cited by 4 articles. 订阅此论文施引文献 订阅此论文施引文献,注册后可以免费订阅5篇论文的施引文献,订阅后可以查看论文全部施引文献

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2. Low I/O Intensity-aware Partial GC Scheduling to Reduce Long-tail Latency in SSDs;ACM Transactions on Architecture and Code Optimization;2021-12-31

3. EZIOTracer;ACM SIGOPS Operating Systems Review;2021-06-02

4. EZIOTracer;Proceedings of the Workshop on Challenges and Opportunities of Efficient and Performant Storage Systems;2021-04-26

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