Residue multipliers using factored decomposition-Reference-Cited by-同舟云学术

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Residue multipliers using factored decomposition

Published:1994 Issue:9 Volume:41 Page:623-627
ISSN:1057-7130
Container-title:IEEE Transactions on Circuits and Systems II: Analog and Digital Signal Processing
language:
Short-container-title:IEEE Trans. Circuits Syst. II

Author:

Dugdale M.

Publisher

Institute of Electrical and Electronics Engineers (IEEE)

Subject

Electrical and Electronic Engineering,Signal Processing

Link

http://xplorestaging.ieee.org/ielx4/82/7748/00326592.pdf?arnumber=326592

Cited by 10 articles. 订阅此论文施引文献订阅此论文施引文献，注册后可以免费订阅5篇论文的施引文献，订阅后可以查看论文全部施引文献

1. A Generalized Residue Number System Design Approach for Ultralow-Power Arithmetic Circuits Based on Deterministic Bit-Streams;IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems;2023-11

2. Modulo Multiplication and Modulo Squaring;Residue Number Systems;2016

3. EFFICIENT RNS-BASED DESIGN OF PROGRAMMABLE FIR FILTERS TARGETING FPL TECHNOLOGY;Journal of Circuits, Systems and Computers;2005-02

4. A Suggestion for a Fast Residue Multiplier for a Family of Moduli of the Form (2n - (2p 1));The Computer Journal;2004-01-01

5. How to fake an RSA signature by encoding modular root finding as a SAT problem;Discrete Applied Mathematics;2003-08

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